An R&D Centre at IIT Bombay

Papers, Reports and Theses 2002-2003
Papers 2002-2003

  • R. Kulkarni and S. Ramesh, Static Slicing of Reactive Programs, Proc. of IEEE International Conference on Source Code Analysis and Manipulation, SCAM 2003, IEEE Press.[ps]
  • A. Iqbal, S.D. Dhodapkar, A. Battacharjee, S. Ramesh, Visual Modeling and Verification of Distributed Reactive Systems, to appear in Proc. of SAFECOMP 2003, Springer, Septemeber 2003.
  • M.G. Nanda and S. Ramesh, Pointer Analysis of Multithreaded Java Programs, Proc. of ACM symp. on Applied Computing,SAC'03, ACM Press, March 2003.
  • Partha S. Roop, A. Sowmya and S. Ramesh, k-time Forced Simulation: A Formal Verification Technique for IP Reuse, Proc. of ICCD, IEEE Press, Sept. 2002.
  • Babita Sharma, S.D. Dhodapkar and S. Ramesh, Assertion Checking Environment(ACE) for Formal Verification of C Programs, Proc. of SAFECOMP 2002, LNCS Vol. 2434, Springer, September 2002.[ps]
  • S. Chakraborty and R. Angrish, Probabilistic Timing Analysis of Asynchronous Systems with Moments of Delay, in Proc. of International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC), pp. 99-108, April 2002.[gzip'd PS]
  • S. Chakraborty and R. Murgai, Layout-driven Timing Optimization by Generalized DeMorgan Transform, in Proc. of Asia-South Pacific Design Automation Conference/VLSI Design Conference (ASP-DAC/VLSI), Jan 2002.[gzip'd PS]
  • S. Chakraborty, Joycee Mekie, and Dinesh K. Sharma, Reasoning about Synchronization Techniques in GALS Systems: A Unified Approach, Workshop on Formal Methods in GALS Architectures (FMGALS), Formal Methods Europe Symposium, Sept 2003.[ps]
  • A. G. Rapsang, A. Saha, K. M. Moudgalya and G. Sivakumar, A software environment for modelling and simulation,, Proceedings of International Symposium on Process Systems Engineering and Control, pp. 247-252, 3-4 Jan. 2003, IIT Bombay.

Papers, Reports and Theses 2001-2002